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Date: 05-10-16

Secure Hash Algorithm-3 processing VLSI IP core within 28K gates

VlSI IP company CAST is making available a new IP core from Beyond Semiconductor for protecting the integrity of electronics transmissions. The Silicon IP is providing a secure HashAlgorithm-3 (SHA-3) IP compliant with latest cryptographic standard from the National Institute of Standards and Technology (NIST)-FIPS 202 and the SHA-3 functions in FIPS 180-4. This new IP by supporting these multiple standards offers a throughput data of 48 Mbits/MHz and also a lesser silicon space which is around 28K gates. Matjaž Breskvar, chief executive officer of Beyond Semiconductor says, “Our hardware implementation of the SHA-3 algorithm gives developers a state-of-the-art cryptographic primitive with which they can harness the advantages of hardware-based security to protect their devices against current and future threats”. “While simply implementing cryptographic primitives is not enough to ensure device security, our efficient hardware implementation of the Keccak sponge function family presents a solid foundation for any secure, future-proof design”. The IP is configurable and flexible, where VLSI engineers can optimize the solution as per the application requirements. This Hash accelerator IP can implement either fixed length or extensible output Hash in function that are provisioned by the standards SHA3-224, SHA3-256, SHA3-384, SHA3-512, SHAKE-128, and SHAKE-256. Another interesting feature of available in this IP is, the engineers can trade off performance and silicon area in two ways by opting for a sophisticated input buffering scheme that allows receiving the next input message while the previous message is being processed and by altering the number of hashing rounds per clock. Nikos Zervas, chief executive officer for CAST says, “Developers wishing to build the most secure, future-looking security into their devices and systems will want to consider using SHA-3”. “This new core makes it easy to integrate SHA-3 hashing into a variety of products with aggressive performance and low-power requirements, and adds a new choice to our encryption cores family that helps developers boost security without requiring extensive cryptography knowledge”. This silicon IP is available immediately either in the form of synthesizable RTL for ASICs or optimized net lists for FPGAs. To know further, Visit the CAST website (www.cast-inc.com)

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