Altera has made available a 3-D integrated system in package device having both FPGA and high speed DRAM. Altera has used Intel’s Embedded Multi-Die Interconnect Bridge (EMIB) technology in assembling this device.
This heterogeneous System-in-Package (SiP) features stacked High-Bandwidth Memory (HBM2) from SK Hynix and Stratix 10 FPGAs and SoCs supporting applications demanding 10x higher memory bandwidth compared to the present discrete DRAM solutions. Applications such as data center, broadcast, wireline networking and high-performance computing systems are some of the examples requiring higher memory bandwidth.
Altera claims it is the first company to integrate this breakthrough 3D stacked memory technology alongside an FPGA. Altera said it is actively working with over a dozen customers to integrate these DRAM SiP products into their next-generation high-end systems.
Intel’s EMIB technology uses a high-density silicon bridge to connect multiple silicon dice together in a single package. EMIB technology employs short traces between die, which Altera claims a more cost-effective, high performance and high throughput compared to interposer-based devices.
“Supporting higher memory bandwidth requirements is one of the biggest challenges many of our customers face as they implement more computationally intensive tasks in their systems, such as machine learning, big data analytics, image recognition, workload acceleration and 8K video processing,” said Danny Biran, senior vice president of corporate strategy and marketing at Altera. “Altera is in a unique position to serve these system requirements by combining the industry’s highest performance FPGA with High-Bandwidth Memory in a single package. No other programmable solution can match Stratix 10 DRAM SiP in terms of performance, power efficiency and memory bandwidth.”
More information on Altera’s heterogeneous SiP strategy is available in a white paper located at www.altera.com/stratix10.
Altera said it will start shipping Stratix 10 DRAM SiP products in 2017.