Flex Logix announced the extension of its core FPGA logic architecture to include Block RAM (BRAM) and DSP cores extending the range of applications for its Flex Logix’ EFLX embedded FPGA-in-SoC architecture.
Flex Logix’ EFLX technology helps in embedding FPGA in SoC to enable key functions to be optimized or customized after the device is completely fabricated and also updating logic after a device is installed into a system in the field.
Applications such as encryption, networking and signal processing require blocks of RAM to be integrated into the FPGA to provide fast local memory to implement buffers, scratchpads, FIFOs, and other low-latency memory that improves performance, says Flex Logix.
"While traditional FPGAs typically offer one type and size of RAM that can “emulate” different widths, Flex Logix’ Block RAM architecture can provide exactly the type and amount of memory an application requires. This flexibility is accomplished by inserting BRAM between the EFLX logic cores—which “tile” together to make an array—controlling them with otherwise unused inward-facing inter-tile I/Os. Flex Logix can support single-port RAM or dual-port RAM, any width, any amount; ECC, parity or no error checking; even MBIST—offering far more flexibility than available in traditional stand-alone FPGA chips." explains Flex Logix.
EFLX DSP Cores helps in applications such as wireless base station digital front ends, image and audio processing, and other applications require high-performance DSP functions such as Finite Impulse Response (FIR) filters, Infinite Impulse Response (IIR) filters, and Fast Fourier Transforms (FFT).
The basic building block for implementing these DSP functions is a pre-adder/multiplier/accumulator (MAC). Flex Logix now offers an EFLX Logic core that incorporates 40 MACs with 22-bit inputs and 48-bit accumulation. The MACs can be combined for 2x precision and pipelined for high throughput. They can also be used as complex-number MACs for certain DSP algorithms.
Single Flex Logix’ DSP core rated to perform as good as stand-alone 28nm FPGA chips, achieving 500 Msamples/second for a 22-bit 5-tap FIR and 300 Msamples/second for a 22-bit 40-tap FIR. Multiple EFLX DSP cores can be combined to implement more complex DSP functions, suggests Flex Logix.
Development Software Evaluation Licenses Now Available and engineers do not require any FPGA expertise to use Flex Logix technology.
The new EFLX BRAM and DSP cores are available now. Silicon validation has been completed in TSMC’s mainstream 28nm process.
Flex Logix says depending on the number and size of EFLX logic, BRAM and DSP cores incorporated into a SoC design, the incremental manufacturing and licensing cost is expected to be less than 5 cents per thousand LUTs.