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Date: 29-08-15

SCE-MI 2.3: More flexibility in VLSI verification flows

The new version of the Standard Co-Emulation Modeling Interface (SCE-MI) 2.3 from Accellera expands the set of SCE-MI compliant DPI function argument data types helping VLSI chip design engineers with improved design portability and in the version the debug interface is extended to provide C-side access to HDL-side registers and also a new mechanism is added to enable a SystemVerilog HVL-side testbench to call DPI functions to HDL-side SystemVerilog and vice versa.

“The goal of the SCE-MI standard is to reduce the effort necessary to get a system into an emulation or prototyping environment for verification,” stated Brian Bailey, Interface Working Group chair. “With the new updates, we are removing restrictions, improving emulation debug capabilities and providing an enhancement to overcome unintended language limitations, giving users more flexibility in their verification flows.”

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