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Date: 02-06-15

Version 6 of SoC VLSI design debugging tools from Concept

Concept Engineering to demonstrate version 6 of the company′s Vision product line to designers of analog, digital, mixed-signal circuits, systems-on-chip (SoCs), and field-programmable gate arrays (FPGAs) at the 52nd Design Automation Conference (DAC) in San Francisco, California, in June 2015.

Concept's product line includes
1. StarVision PRO: analog, digital and mixed-signal debugging capabilities, customizable design rule checks and automated netlist pruning,
2. RTLvision PRO:RTL debugging and intellectual property (IP) development,
3. GateVision PRO:netlist debugging of complex SoC netlists,
4. SpiceVision PRO: exploration and debugging features for transistor-level and post-layout netlists.

"With version 6, we continue to improve our specialized product family with individual tools for specific circuit debugging problems," said Pascal Bolzhauser, product manager for Concept Engineering′s Vision product line. "We have made specific enhancements to each tool and we also have incorporated multiple general usability improvements.".

The enhanced features in the ver. 6 platform as explained by Concept are:

1. Improved netlist pruning: In addition to Verilog and SPICE netlist export and pruning, StarVision PRO now also allows netlist pruning for the most common post-layout formats, DSPF and SPEF.

2. Advanced post-layout debugging: Improved visualization and debugging of parasitic networks.
API improvements: Improvements in the database API and GUI API allow even more sophisticated code to be developed and executed by the tool.

3. Advanced batch processing: Enhanced batch processing capabilities allow more efficient processing of user-defined analysis and debugging tasks.

4. Unified File Open Dialog: Makes it easier to load complex mixed-language SoC designs and libraries.
Improved visual debugging capabilities such as: Smart connectivity lens view, improved schematic navigation history, and on-the-fly hierarchy exploration with built-in fold and un-fold controls.

Availability: Version 6.0 products are available now to download from the company′s website. There are no additional fees for existing customers with valid licenses.

Concept has also announced it has signed a multi-year OEM agreement to integrate and use Concept Engineering′s Nlview customizable schematic generation engine as the visualization engine within Aldec′s clock domain crossing analysis tool, ALINT-PRO-CDC. The new ALINT-PRO-CDC fault analysis GUI cockpit allows design engineers to more easily understand and fix critical CDC problems and to deliver higher quality designs.

"ALINT-PRO-CDC ensures that metastability issues are not overlooked during functional verification, which can lead to random design failures in the field," said Mirek Marciniszyn, Executive Director of Operations at Aldec. "Adding Nlview′s visualization to our ability to uncover critical problems during RTL design and functional verification significantly cuts down time to market."

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