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Date: 27-05-15

Synchronous SRAM with on-chip error-correcting code

Cypress Semiconductor has made available 36Mb synchronous SRAMs with on-chip Error-Correcting Code (ECC). ECC makes the data reliable for applications such as military, communication and data processing. Cypress said it is launching higher density SRAMs later this year.

"Soft errors caused by background radiation can corrupt memory content, resulting in a loss of critical data. A hardware ECC block in Cypress’s new synchronous SRAMs performs all error correction functions inline, without user intervention, delivering best-in-class Soft Error Rate (SER) performance. The synchronous SRAMs with ECC are pin-compatible with current synchronous SRAMs, enabling customers to enhance SER and system reliability while retaining board layout. Additionally, the new SRAMs help reduce power consumption by as much as 36% over competing solutions." explains Cypress. A video introducing Cypress’s synchronous SRAMs with ECC is available at www.cypress.com/syncECCvideo.

The new 36Mb synchronous SRAMs are currently available in industrial temperature grade in RoHS-compliant 100-pin TQFP and 165-ball BGA packages.

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