For some applications if you still would like to use 8-bit 8051 processor IP , you might be impressed by the latest 8051 processor IP core from Poland based Digital Core Design (DCD). DCD has introduced the latest DQ8051 IP Core with a Dhrystone 2.1 performance rating of 0.27292 DMIPS/MHz, a 29.01 times high over the original 80C51 chip operating at the same frequency, according to the claims by DCD.
DQ8051 is also designed to consume low dynamic power of 1.2µW/MHz, comparable to low-power 32-bit processors.
There are few simple and valid reasons for engineers still using 8051 in their designs. 8051 is the most popular processor core for microcontrollers even now. Huge amount of reference designs, DIY projects, and reusable assembly language code is available for 8051 for huge number of applications.
The problem with the 8-bit is, it cannot support today's data size requirements for many applications. Most of the applications need 32-bit resolution. The audio and touch interface are making big entry into lot of new areas in embedded space, even the 32-bit processors new need to improve their data handling capability to handle audio and other multi media like data handling.
Key Features of the DCD's latest 8051:
· 100% software compatible with 8051 industry standard
· Quad-Pipelined architecture enables to run 29.01 times faster, than the original 80C51 at the same frequency
· Up to 27.297 VAX MIPS at 100 MHz
· 24 times faster multiplication
· 12 times faster division
· 2 Data Pointers (DPTR) for faster memory blocks copying
o Advanced INC & DEC modes
o Auto-switch of current DPTR
· Up to 256 bytes of internal (on-chip) Data Memory - IDM
· Up to 64k bytes of Program Memory
· Up to 16 MB of external (off-chip) Data Memory - XDM
o Synchronous interface for up to 64K bytes of (on-chip) fast external Data Memory - (SXDM)
· User programmable Program Memory Wait States solution - for wide range of memories' speed
· User programmable External Data Memory Wait States solution - for wide range of memories' speed
· De-multiplexed Address/Data bus - to allow easy memory connection
· Interface for additional Special Function Registers
· Fully synthesizable
· Staticsynchronous design
· No internal tri-states
· Scan test ready
· USB, Ethernet, I2C, SPI, UART, CAN, LIN, HDLC, Smart Card interfaces available