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Date: 14-08-14

EUV litho sys by ASM exposes more than 500 semiconductor wafers per day

Leading lithography semiconductor equipment maker ASML reported its customer has exposed more than 500 semiconductor wafers on an NXE:3300B EUV system within 24 hours.

"We are pleased that one of our systems was able to expose 637 wafers in a day in an endurance test, which demonstrates the current capability of our EUV platform. The endurance test was designed to simulate a production run. The run exceeded the 500 wafer per day requirement that our customers had set us for the end of the year. However, since this is only a single data point, this performance now needs to be repeated on multiple days and multiple systems, which is the goal of our availability improvement programs that will be executed throughout the remainder of the year," said Peter Wennink, ASML CEO.

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