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Date: 22-05-14

Faster packaging design solutions from Cadence

Cadence has announced its new software which can reduce silicon die to package connect planning time from weeks to few days. Cadence has built this solution using its own technology called OrbitIO, where iterations between silicon and package design teams are reduced and also, time to converge on the physical interface between the die and package up to 60 percent.

Cadence OrbitIO technology is said to provide seamless integration with Cadence SiP Layout and the Cadence Encounter digital implementation platform.

Cadence says this solution enable fabless semiconductor or systems companies to evaluate package route feasibility, and allows them to communicate a route plan to their package design resources, whether it is to an internal group or to an outsourced assembly and test (OSAT) provider.

“The Cadence OrbitIO global view of system connectivity helps Faraday reduce the time required to converge on the optimal die bump to package ball pad assignment,” said Dr. Wang-Jin Chen, senior technologist of Faraday. “The combination of connectivity optimization and route feasibility functions helped us produce a route plan resulting in two fewer package layers with all DDR signals implemented on a single package layer.”

To learn more about OrbitIO technology, visit: www.cadence.com/products/sigrity/orbitio/pages/default.aspx

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