Arteris has announced FlexNoC Composition, a new feature embedded within the FlexNoC interconnect IP, which allows VLSI design engineers to integrate the individual interconnects from all SoC subsystems into one. This technology helps VLSI design teams to work at different locations simultaneously without much of the design flow issue. Arteris says its IP saves development time from 18 months to 9 months for even the most complex SoCs.
Arteris explains: FlexNoC Composition allows the SoC architecture to be subdivided for implementation by various specialist design teams, each working independently on their own subsystem. Once all subsystems are complete, each can be integrated into one complete full chip-level FlexNoC interconnect fabric without requiring bridges. FlexNoC Composition works for fully abutted and channeled floor plans. Unlike a hybrid bus or crossbar, FlexNoC Composition re-connects each subsystem seamlessly through a specialized low-latency protocol, Re-assembly is simple, regardless of revisions made to the IP block addressing, transaction protocols, or command sets during the development process. The chip verification process is also easier and faster. These features make the development of a family of derivative chips to meet individual system OEMs’ specific requirements a plug-and-play process.
“Arteris continues to advance network-on-chip technology with the FlexNoC Composition feature,” said Jim McGregor, principal analyst at TIRIAS Research. “FlexNoC Composition should enable design teams to dramatically improve SoC design partitioning - speeding development time and increasing parallel subsystems.”
“FlexNoC Composition is enabling chip companies to make more innovative chips - faster,” said K. Charles Janac, President and CEO of Arteris. “While their first platform is ramping to volume, global design teams can quickly create derivatives, allowing companies to target other markets with application-specific features based on the original SoC platform. FlexNoC Composition truly reflects our vision for a plug-n-play interconnect fabric IP.”
key advantages of FlexNoC as said by Arteris:
Accelerated time-to-market through shorter design cycles
Reduced die size and cost of chips
Ability to produce multiple chip derivatives based on a common SoC platform
Greater interconnect speeds and lower interface latency resulting in improved performance
Reduced power consumption due to advanced clock and power management features, and fewer gates and wires.