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Date: 24-12-13

First 100G Ethernet functionality using hard IP on FPGA

FPGA maker Achronix Semiconductor has said it has demonstrated error-free operation of 100G Ethernet functionality using the hard Ethernet IP in its Speedster22i FPGAs. Achronix claims Speedster22i are the only FPGAs that have hardened IP for communication applications including 100G Ethernet, 100G Interlaken, PCI Express Gen3 x8 and DDR3 memory controllers. The 100G Ethernet video demonstration is available at Achronix.com.

“The hardened IP functions in Speedster22i FPGAs translate directly into power and cost savings for high bandwidth communication applications,” said Steve Mensor, vice president of Marketing at Achronix. “More importantly, the hardened IP functions eliminate the challenges associated with closing timing for these high performance applications.”

Speedster22i FPGAs are built on Intel’s advanced 22nm, 3-D Tri-Gate transistor technology. Speedster22i HD devices consume half the power and are half the cost of competitive high-end FPGAs for targeted high bandwidth applications, claims Achronix.

Achronix has demonstrated 100G Ethernet on the HD1000 device, which has 1 million effective programmable look-up-tables (LUTs). The HD680 is the second member of the Speedster22i family and is scheduled to ship in Q1 2014.

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