MoSys sampling its Bandwidth Engine-2 access device with random access performance with more than four times the capacity and more than twice the access performance of any SRAM on the market. The device is based on an architecture of four 144 Megabit (Mbit) partitions, each running at 375MHz with true dual-port, random access capability. The partitions are addressed as a single-bank to enable a dramatic increase in processing rate capability.
The Bandwidth Engine family of ICs is designed for the networking equipment operating in the bandwidth of 40G, 100G, 400G or higher. MSR720, with the ability to simultaneously read and write to a specific memory location, is said to deliver 576 Mbit capacity and up to 4.5 billion accesses per second, at least twice the access rate of a traditional SRAM, claims MoSys. The dual-ported partitions rely on address compare and data bypass to ensure fully coherent data under any access condition.
Full data coherency, high command efficiency and simplified scheduling are the special features of MSR720 to access up to 4.5 GigaAccesses per second. These special features make MSR720 highly ideal solution for state memory and queuing applications, where repeat access of the same address is needed.
"Our second generation Bandwidth Engine architecture supports purpose-built variants to optimize specific applications and access types," stated John Monson, Vice President of Marketing for MoSys. "The MSR720 is intended to integrate the random access capabilities of traditional SRAM and relieve constraints in capacity and performance, together dramatically reducing board area, power, economics and pin count."
MSR720 is suitable for high-reliability, carrier-grade applications and utilizes a high-performance SerDes-based GigaChip Interface to connect to ASICs and FPGAs from Altera and Xilinx. MoSys is now accepting sample and preproduction orders for the MSR720, MSR620 and MSR820 devices. For more information visit http://www.mosys.com