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Tool provide detailed info about the post-layout interconnections on SoC chips

Date: 28/05/2013
Concept Engineering has added a new SPEF (standard parasitic exchange format) interface to their VLSI debugging tools, SpiceVision PRO and StarVision PRO. VLSI engineers can debugg their chip design by converting their SPICE netlists and SPICE models into a trasistor level circuit diagrams/schematics using Concept Engineering 's SpiceVision PRO EDA software tool. Another tool StarVision PRO for Concept is an integrated debugging cockpit for Mixed-Signal design, makes analysis and debugging of complex SoC (system on chip) and IC (integrated circuit) designs easy and more transparent.

Concept says the newly added SPEF interface, and the already-available DSPF (Detailed Standard Parasitic Format) interface, give design engineers using SpiceVision PRO and StarVision PRO an easy way to analyze and explore parasitic structures in order to better understand, manage and optimize timing, signal integrity or IR-drop within their designs. The SPEF file format is an IEEE standard to define parasitic networks and contains precise information about interconnections and the related parasitic components.

Concept Engineering says its new SPEF interface provides engineers with very detailed information about the post-layout interconnections on their chips, allowing them to easily visualize and explore parasitic netlists and to precisely locate and understand post-layout problems. In addition the new technology provides a very comfortable way to isolate and generate post-layout SPICE netlists of specific critical circuit fragments. Such isolated netlist fragments can then be used for fast and detailed circuit simulation and result in significantly accelerated post layout simulation, suggest Concept.

"Concept Engineering is focused on providing design and verification engineers with the best possible ways to understand and analyze complex design descriptions from different sources, different design languages and on different design levels," said Gerhard Angst, CEO and president of Concept Engineering. "Now, with two dedicated interfaces available, customers will be able to more easily understand and manage extracted parasitic netlists and the impact of parasitic elements on their designs. The SPEF and DSPF interfaces provide users with a comfortable way to visualize and analyze the most important post-layout data formats of today's advanced design flows."

Price and availability: The SPEF interface for StarVision PRO is available at no additional cost. For SpiceVision PRO, the SPEF interface is available as part of the optional "Parasitic Analysis Package."

VLSI design engineers visiting DAC 2013 can see the demo at booth number 1842 in Austin, Texas, from June 3-5.