Toshiba has announced it has developed second generation 19 nanometer process technology that it will apply to mass production of 2-bit-per-cell 64 gigabit NAND memory chips later this month of May 2013.
Toshiba says it has used the new generation technology to develop the world's smallest 2-bit –per-cell 64 gigabit NAND memory chips, with an area of only 94 square millimeters. Using a unique high speed writing method, the next generation chips can achieve a write speed of up to 25 megabytes a second - the world's fastest class in 2-bit-per-cell chips.
Toshiba said it is also developing 3-bit-per-cell chips by using this process technology and aims to start mass production in the second quarter of this fiscal year. The company to initially introduce 3-bit, multi-level-cell products for smartphones and tablets by developing a controller compatible with eMMC, and will subsequently extend application to notebook PCs by developing a controller compliant with solid state drives (SSD).