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IP and verification IP from Cadence for M-PCIe

Date: 08/03/2013
Cadence Design Systems has introduced both the Silicon IP and verification IP for Mobile PCI Express (M-PCIe) specifications.

“M-PCIe helps boost mobile device performance by delivering best-in-class, highly scalable I/O functionality, enabling the migration of business apps to smartphones and tablets as they take on the role of primary computing devices,” said Al Yanes, chairman and president, PCI-SIG. “We are delighted that Cadence is enabling SoC developers to rapidly adopt M-PCIe by delivering IP and VIP products supporting this standard.”

Cadence says its M-PCIe IP and VIP solution enables the PCI Express architecture to operate over the MIPI M-PHY physical layer technology, extending the benefits of the PCIe I/O standard to low-power mobile devices including thin laptops, tablets and smartphones. Teaming the benefits of the PCI Express standard with the leading mobile physical interface (M-PHY) is expected to enable greater innovation in mobile devices as technology developed for the wired world is migrated to mobile platforms, as per Cadence.

“Mobile PCI Express is foundational to developing the next generation of mobile devices,” said Martin Lund, senior vice president, SoC Realization Group, Cadence. “By providing the IP and VIP supporting the newly minted specifications, customers can now get their cool, new products to market much faster.”