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Date: 03-03-13

Tool compare synthesizable RTL codes without testbenches or simulation vectors

OneSpin Solutions has announced immediate availability of 360 EC-RTL, equivalence checking software that compares revisions of register transfer level (RTL) code. 360 EC-RTL is part of the OneSpin 360 EC Product Family. An RTL-to-RTL equivalence checker features register, sequential and power optimization verification.

“Our formal verification solutions now span the entire SoC design project and can be used by system integrators, verification engineers and designers,” notes Dr. Raik Brinkmann, OneSpin Solutions’ president and chief executive officer.

OneSpin says its 360 EC-RTL compares two revisions of synthesizable RTL code without the need for testbenches or simulation vectors. It checks register optimizations for duplication, merging, removal of constant flop and movement across hierarchies. A re-encoding feature eliminates the need for a user to re-input finite state machine (FSM) encoding knowledge.

360 EC-RTL supports Verilog, SystemVerilog and VHDL, automatically handling duplicate, merged and constant registers. Output formats can be either a log file when used in batch mode or a graphical user interface with source view, schematic and driver/load tracing. The tool can be used to revise IP and RTL code and to compare VHDL and Verilog versions of an IP block.

To employ the tool, a verification engineer inputs the golden Verilog, SystemVerilog or VHDL RTL code, as well as the modified RTL code to run the equivalence checker. The tool then automatically compares the new RTL code with the golden RTL code. If the code is modified, the modified version would be entered as well and run through the equivalence checker. The tool would automatically compare the new RTL code with the golden RTL code.

Availability: OneSpin’s 360 EC-RTL is shipping now.
For more information, visit www.OneSpin-Solutions.com.

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