Date: 17th July 2011
Applied Materials' new equipments does
atomic scale chips
Applied Materials, Inc. has launched its Applied Centura
Integrated Gate Stack system for creating the critical gate
dielectric structures in 22nm logic chips. Applied Materials
says this system is the only tool available that can process
the entire high-k multilayer stack in a single vacuum environment,
thus preserving the integrity of its critical film interfaces.
Applied Explains as logic chips scale down to the 22nm
node and beyond, the heart of the transistor gate structure,
its dielectric film stack, is becoming so thin that it must
be atomically engineered. To meet this challenge, the Integrated
Gate Stack system features Applied's advanced atomic layer
deposition (ALD) technology, which builds ultra-thin, hafnium-based
layers less than 2nm in thickness - about one hundred thousandth
the width of a human hair - a fraction of a monolayer at
a time, with unmatched uniformity across the wafer.
More importantly, as these films become thinner, the interfaces
between adjacent layers become more crucial. The new Integrated
Gate Stack system fabricates the entire gate dielectric
gate stack - involving typically four process steps - entirely
under vacuum. This unique approach avoids contamination
of the interfaces from exposure to ambient air which can
degrade transistor performance. Applied's researchers have
found that eliminating air exposure during processing offers
a significant performance boost: mobility in the transistor
can improve by up to 10% and switching voltage variability
between transistors can be reduced by up to 40%, enabling
the manufacture of faster, higher-value chips.
"Tomorrow's nanoscale transistors require incredible
precision because films just a few atoms thick will determine
device performance," said Steve Ghanayem, group vice
president and general manager of the Metal Deposition, Front
End and ALD Products division at Applied Materials. "By
combining multiple adjacent processing steps on our world-class
Centura platform, we can simplify customers' process flows
and help them achieve high production yields of their next-generation
logic chips."
"There is a tremendous increase in chip complexity
as we move to the 20nm era and one of the biggest changes
is at the transistor level where we are seeing a complete
redesign of this important building block for electronic
devices. Our customers saw the benefit of Applied's Metal
Gate Stack solution and worked with us on the same integrated
approach for the dielectric gate stack," said Dr. Randhir
Thakur, executive vice president and general manager of
the Silicon Systems Group at Applied Materials. "The
new Centura Integrated Gate Stack system is the latest of
several innovative systems Applied has launched in recent
months, all designed to enable our customers to transition
their cutting-edge transistor designs from the lab to high
volume manufacturing."
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