Altera introduces Stratix V FPGAs with support for RLDRAM 3 memory

Altera has released its Stratix V family of FPGAs to support Micron Technology's reduced-latency DRAM (RLDRAM). Stratix V FPGAs feature a new memory architecture that delivers high system performance with low latency and high efficiency. Stratix V FPGAs provide networking equipment manufacturers with a memory interface solution capable of transferring voice, video and data across the Internet.

"Micron's next-generation RLDRAM 3 memory is designed specifically to meet the requirements of today's high-bandwidth networking applications and enable a faster, more efficient transfer of data over the network," said Bruce Franklin, senior business development manager for Micron. "Our long-standing relationship with Altera, combined with their commitment to providing high-performance FPGA solutions, is giving designers an effective pathway to more easily implement our leading reduced-latency memory."

Stratix V FPGAs deliver a high-throughput memory interface to external memory devices such as RLDRAM 3. All of the critical circuits in the device's read/write path are hardened to simplify timing closure at high frequencies. To complement Stratix V FPGAs, Altera offers memory controller cores and associated design software that automatically reduces design cycle time when working with external memories.

"Altera and Micron have worked together for years on advancing the system throughput of our bandwidth-constrained customer base by improving the latency and performance of the FPGA memory interface. This enables our customers to get to market quickly with highly differentiated solutions," said Luanne Schirrmeister, senior director of component product marketing at Altera. "The new innovations made to the Stratix V memory architecture enable us to deliver the most efficient memory interface targeting today's highest performance networking applications."

For more information visit: www.altera.com.