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Date: 13th Oct 09
Synphony HLS with unique M-language and model-based solution
from Synopsys
Synopsys has introduced its Synphony HLS (High Level Synthesis)
solution that integrates M-language and model-based synthesis
to deliver up to 10X high design and verification productivity
than RTL flows for communications and multimedia applications.
Synphony HLS integrates with Synopsys' design compiler,
Synplify Premier, Confirma, VCS, System Studio and Innovator
products to deliver the most comprehensive prototyping,
implementation and verification flows from algorithm to
silicon.
The Synphony HLS solution delivers high productivity such
as,
An automated flow from M to optimized RTL
Synthesis of optimized RTL architectures for ASIC and FPGA
Rapid prototyping methodology for early algorithm validation
C-model generation for early software development and fast
system validation
Unified verification across multiple flows including prototyping
and ASIC implementation
"The Synphony HLS solution will dramatically change
how FPGAs and ASICs are used for system validation and embedded
software development," said Richard Cagley, Ph.D.,
algorithm developer, Toyon Research Corporation. "Traditional
HLS methodologies continue to incur significant hardware
engineering resources to translate my algorithms to RTL
for implementation into FPGA or ASIC silicon. Synphony HLS
enables me to use MATLAB for both high-level simulation
and production code, meaning that I can now go from simulation
directly to hardware in a matter of hours or days instead
of months or years. This has a vast impact on our productivity,
schedules and quality of products based on our algorithms.
"Until now, there has not been an automated way to
derive a coherent verification flow across abstraction levels
nor an implementation flow with optimized output from the
very popular M language," said Gary Meyers, vice president
and general manager of the Synplicity Business Group at
Synopsys. "With Synphony HLS, we can provide a faster
and more reliable path to system and software validation
than competing solutions. Combined with Synopsys' technology-leading
system prototyping and hardware-assisted verification solutions,
design teams can more economically and more reliably design
and verify their complex chips and software."
Availability: Now in limited customer availability with
general availability by the end of calendar year 2009
For more details visit www.synopsys.com
Editorial Product Rating: Average Plus
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