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Design guide

New System Solutions for Laser Printer Applications
By Oreste Emanuele Zagano STMicroelectronics

INTRODUCTION

Recently, the laser printer market has started to move away from custom OEM-designed formatter boards, where the brand manufacturer designs the complete system and outsources the mass production. Replacing this is an ODM approach, where external companies take charge of the entire system, including the design.

This trend began first in the low-end models, like host-based multifunction printers, but in the near future it will extend to the mid- and high-end models also, moving most of the system-level design from the brand manufacturer to external third parties, with expertise in specific areas.

This opens the market to companies with strong competence in ASICs and other areas needed to master the whole process and to offer a complete system solutions for laser printer brand manufacturers such as firmware, image processing, software, board design, test and qualification,.

With a single external company undertaking the entire system design, the printer brand manufacturer is able to reduce the number of suppliers and take advantage of a tight synergy among different areas that consequently results in a shorter development time to launch new products on the market.

In order to be ready to provide best-in-class solutions, chip-design companies must establish strong partnerships with external companies with complementary skills, creating a team capable of producing a full working prototype of a formatter board, aimed at demonstrating the accumulated system level expertise.


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System description

In our lab, the initial goal was to replace the existing formatter board inside a laser printer bought on the market with a new one, entirely designed with a customized mass-market chip in order to achieve a higher level of integration and to reduce the overall cost of the BOM of the final board.

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Fig. 2 - Lab test bench and equipment

The reference printers were two low-end host based single function printer models:
· A monochrome printer with 600 x 660 dpi resolution, 20 ppm , A4 paper format, costing less than $200
· A color printer with 600 x 600 dpi resolution, A4 paper format, costing around $450

We used the overall plastic chassis, the mechanics, and the complete laser engine of the two reference printers, in conjunction with the new formatter board, simply moving the flat cable of the original formatter.
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Fig. 3 - Color (top) and B&W (bottom) formatter board replacement with our solution

The prototype is based on a development board that includes an ARM9EJ-S® microprocessor, the standard and connectivity peripherals (DDR2 memory, USB 2.0 host and device, Ethernet IF, serial NOR Flash), and a Virtex 5 Xilinx® FPGA, used to implement the specific blocks needed to manage the serial interface and the laser engine controller.

The development board can be easily controlled by a run-time debugger on a PC, connected with a hyperterminal serial interface and supporting a JTAG debugger to allow firmware development.

An adapter board was designed to connect the development board with the specific connectors required by black and white and color laser engines chosen for the test. The adapter fits these two models widespread on the market, but it can be easily modified to be compliant with other models, on customer demand.

Hardware

The core of the system is a SPEAr600 device that provides the main architecture built around the ARM9EJ-S® microprocessor and a set of standard peripherals connected with an AMBA bus. The following are the main features of the device:

Dual ARM926 (DC 16KB, IC-16KB) running up to 333 MHz
Memory controllers
DDR1/DDR2 controller
Serial Flash controller
Parallel NAND controller
Connectivity
USB 2.0 device
2 x USB 2.0 hosts
Ethernet 10/100/1000
UARTs, I2C, SPIs, IrDA
Customizable logic: 600 Kgates + 128 KByte of SRAM memory
Boot ROM: 32 KB
Color LCD controller
JPEG codec
Spread spectrum clock
ADC: 10-bit, 8 channels, 1 Ms/s
8 channels, general purpose DMA
Real time clock, timers
Multi-layer interconnect matrix

To read this full article in PDF click this link to download


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